The trend in electronic components has lead to the development of integrated circuits (ICs) that have higher operating frequencies and require less power per gate. This has been achieved in part by a reduction in the feature sizes that make up the transistors and wires that comprise the ICs. As a consequence, the amount of charge that is required to store a bit of information is about one-tenth of a pico-coulomb (pC), or about 600,000 electrons. Because the amount of charge is so small, cosmic rays can deposit enough charge in an IC to cause a single-event upset (SEU) and alter the state of the memory bit.
The importance of cosmic rays on the performance of integrated circuits in a space environment is evident in the upset rates of various satellites and spacecraft. For example, the Tracking and Data Relay satellite experiences a single event upset per day, which must be corrected from the ground. Such adverse experiences have caused a re-design of spacecraft, such as the Galileo spacecraft. The characterization of static random access memories or SRAMs, due to ion induced upsets is essential to evaluating the susceptibility of SRAMs and application-specific integrated circuit (ASIC) registers to cosmic ray upsets. This characterization usually requires evaluations at an ion source, such as a cyclotron. Such evaluations are time consuming, expensive and error prone. In recent years, laser pulses have been proposed as substitutes for the heavy ion sources. However, the laser simulations are limited by metal layers that frequently block the laser pulses from SEU-sensitive nodes and by the complexity of the ion-photon calibrations. The solution to the single event upset problem continues to be important, as the complexity of spacecraft grows, the size of integrated circuits decrease and as space systems are designed with circuits fabricated at non-radiation hardened foundries.
For present day ICs in a 10% worse case cosmic ray environment, the upset rate is in the 10.sup.-8 to 10.sup.-4 SEUs per bit-day range. This means that a spacecraft with 10.sup.8 bits of memory would experience between 1 and 10,000 upsets per day 90% of the time. But 10% of the time, the upset rate would be higher.
The upset of a semiconductor memory cell by an ion, caused by cosmic rays or other sources, depends on the charge deposited in the sensitive regions of the memory cell. The sensitive regions are found at reverse biased junctions whose charge can be dissipated by an ion strike. The sensitivity of the cell to upset can be influenced through cell layout, fabrication, and operating characteristics. Each of these factors influences the critical charge (minimum required charge to cause cell upset) through the cell nodal capacitance, the p-n junction parameters, and/or the transistor parameters. The passage of an ion through the cell creates hole-electron pairs which can deposit enough charge to short out sensitive junctions and cause the cell to change state. The amount of charge deposited depends on a number of factors, including the ion type, energy, incident angle, and capture cross-section of the cell.
Much progress has been made in the hardening of static random access memory cells against cosmic ray induced SEUs. In recent years, cross-coupled resistors have been introduced into the six-transistor SRAM cell to reduce the SEUs. Most recently, an engineering design equation, termed the Petersen Equation, has been developed that relates the transistor critical charge and junction area and the 10% worst case cosmic ray spectrum to the expected upset rate of SRAMs in an earth orbit.
The upset rate R (in upsets/bit-day) as given by the Petersen Equation is EQU R=5.times.10.sup.-10 A(.mu.m.sup.2)[D.sub.c (.mu.m)/Q.sub.c (.sub.p C)].sup.2,
where for a 10% worst case cosmic ray (an ion) spectrum A is the cell cross-section, DC is the collection depth and Q.sub.c is the critical charge. An improved device is required to characterize the coefficients found in the Petersen Equation so that spaceborne ASICs, fabricated along with the test device, will be designed to have maximum protection against SEUs.